Responsibilities

1. Working closely with IP design team to define PCIe validation methodology
2. Develop silicon level PCIe test plan, working with validation tools or test script to verify all PCIe features
3. Attend ASIC bring-up and validation test, execute all PCIe feature test plans and track to be successfully enabled
4. To be responsible for system level issue debugging
5. Develop automation tool/script to improve memory test efficiency
6. Provide technical support for both internal and external customers application

Requirements

1. Bachelor or Master in EE/CS or equivalent is required
2. Knowledge on PCI/PCI express architecture and hands-on experience with test equipment using
3. Familiar with high speed signal integrity theory and test methodology
4. Strong skills in system level issue debug and analyzing
5. Experience in software development with script languages such as Perl, or Python
6. A quick learner for new technologies and team player